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rev.1.0, sep.23.2 003, page 1 of 49 M61250BFP ntsc 1 chip tv signal processor rej03f0088-0100z rev.1.0 sep.23.2003 description the M61250BFP is a single-chip semiconductor integrated circuit that contains the signal processing for ntsc color television. all of the signal processing circuits for video intermedia te frequencies, vocal intermedia te frequencies, video, color, and polarization, as well as i 2 c bus control, are built in, and television sets ranging from popular-class to medium-grade sets are supported. moreover, the m37150 8-bit microcomputer for the television and the interconnection pin are opposite each other, so that less space is required for mounting. features ? no vco coil for vif required ? internal unregulated vocal demodulator ? pll-split sif system for fm radio ? fsc output ? acl or abcl can be selected ? internal horizontal oscillation probe ? internal perpendicular sawtooth wave generator ? internal self-diagnosis function ? internal black peak hold, afc2, killer filter ? h & v pulse output for osd ? internal reset circuit and clock output for microcomputer use ? internal 5 v and 8 v regulators applications ? ntsc color television receivers recommended operating conditions ? power supply voltage range: 4.75 v to 5.25 (pins 3, 4, 39, 40) 7.6 v to 8.4 v (pins 12, 44) 8.3 v to 9.1 v (pin 42) ? recommended power supply voltage: 5.0 v (pins 3, 4, 39, 40) 8.0 v (pins 12, 44) 8.7 v (pin 42)
M61250BFP rev.1.0, sep.23.2 003, page 2 of 49 pin configuration (top view) nc def vcc dri ve g nd chro ma apc f i lt e r vi deo / chro ma vcc dri ve vcc vi deo / chro ma g nd 1 2 3 4 5 6 7 8 9 10 11 12 13 14 42 41 40 39 38 37 36 35 34 33 43 45 46 44 15 16 48 47 M61250BFP vif vcc sif vcc h o ut afc filter logic gnd fbp in aft out def g nd b out r o ut g out ramp out v ramp f/b v ramp cap tv/y in vreg vcc ext/c in hi vcc limiter in x-tal 3.58 acl/abcl 8.7v reg out audi o at t f i lt er nc nc
M61250BFP rev.1.0, sep.23.2 003, page 3 of 49 pin explanations pin no. name pin peripheral circuit dc voltage (v) 1 v ramp cap 2 aft out 0.3 to 4.7 3 4 vif v cc sif v cc 5.0 v 5 ramp out 4.6 6 v ramp feed back
M61250BFP rev.1.0, sep.23.2 003, page 4 of 49 pin explanations (cont) pin no. name pin peripheral circuit dc voltage (v) 7 afc filter 3.5 v 8 9 def gnd logic gnd 10 fbp in v th : 2.0 v (fbp vth l = off) v th : 1.0 v (fbp vth l = on) 11 h out v ol : 0.0 v v oh : 5.4 v 12 def v cc 13 nc 14 15 16 r out g out b out
M61250BFP rev.1.0, sep.23.2 003, page 5 of 49 pin explanations (cont) pin no. name pin peripheral circuit dc voltage (v) 17 h vco feedback 3.0 v 18 intelligent monitor 19 inv fbp out v ol : 0.0 v v oh : 5.0 v 20 v pulse out v ol : 0.0 v v oh : 5.0 v
M61250BFP rev.1.0, sep.23.2 003, page 6 of 49 pin explanations (cont) pin no. name pin peripheral circuit dc voltage (v) 21 22 23 b in g in r in (1) digital osd vil: 0.0 v vih: 3.0 v (2) analog osd 0.7 vp-p 24 fast blk 0.0-0.5 v: int rgb 1.5-3.0 v: h tone 4.0-5.0 v: ext rgb 25 clk control v th : 3.0 v 26 sda v il : 0.75 v v ih : 4.25 v
M61250BFP rev.1.0, sep.23.2 003, page 7 of 49 pin explanations (cont) pin no. name pin peripheral circuit dc voltage (v) 27 scl v il : 0.75 v v ih : 4.25 v 28 power on control v th : 3.0 v 29 fsc out 1 3.0 v 30 mcu reset h: 5.0 v l: 0.0 v
M61250BFP rev.1.0, sep.23.2 003, page 8 of 49 pin explanations (cont) pin no. name pin peripheral circuit dc voltage (v) 31 y sw out 1.7 v 32 mcu 5.7 vreg out 5.7 v 33 acl/abcl 34 x-tal 3.58 3.3 v 35 36 drive gnd video/chroma gnd 0.0 v
M61250BFP rev.1.0, sep.23.2 003, page 9 of 49 pin explanations (cont) pin no. name pin peripheral circuit dc voltage (v) 37 chroma apc filter 3.2 v 38 ext/c in 1.7 v 39 40 drive v cc video/chroma v cc 5.0 v 41 tv/y in 1.7 v 42 vreg v cc 8.7 v 43 audio att filter 2.75 v to 3.25 v 44 hi v cc 8 v 45 46 nc
M61250BFP rev.1.0, sep.23.2 003, page 10 of 49 pin explanations (cont) pin no. name pin peripheral circuit dc voltage (v) 47 8.7 vreg out 8.7 v 48 limiter in 2.5 v 49 5.7 vreg out 5.7 v 50 inter carrier out 2.3 v
M61250BFP rev.1.0, sep.23.2 003, page 11 of 49 pin explanations (cont) pin no. name pin peripheral circuit dc voltage (v) 51 audio out 2.3 v 52 audio bypass 2.3 v 53 ext audio in 3.0 v 54 fm direct out 3.0 v
M61250BFP rev.1.0, sep.23.2 003, page 12 of 49 pin explanations (cont) pin no. name pin peripheral circuit dc voltage (v) 55 vif vco feedback 3.0 v 56 57 sif gnd vif gnd 58 video out 2.7 v 59 rf agc out 0.3 to 4.7 v 60 vif apc filter 3.0 v
M61250BFP rev.1.0, sep.23.2 003, page 13 of 49 pin explanations (cont) pin no. name pin peripheral circuit dc voltage (v) 61 62 vif agc filter 2 vif agc filter 1 2.3 v 63 64 vif in (1) vif in (2) 1.6 v
M61250BFP rev.1.0, sep.23.2 003, page 14 of 49 block diagram cut off sharpness mu te a ft ou t defeat rf agc out rf agc if a gc vco lock det video det apc det adj det ref filte r vif in vif amp aft clamp video ton e chroma bpf hpf apc det vcxo 3.58mhz fb p in afc 1 h vco afc 2 h coinci. h. output v.ramp h-phase horizontal count down vertical count down hv blk clamp bus i / f audio out g in r v.out g out p ut r in b in fast blk scl sda drive amp b ext r ext inp ut inp ut inp ut g e x t r b drive fm det li mite r rgb ma tr ix contrast demodulator sync sep v sync tr ig eq eliminate afc gain tin t bgp ge n killer det a c c det acc direct out de lay adj h stop service sw r g b delay dl color chroma tr a p sw bright 1 v p-p 5v bright contrast h coinb video mu te fin e dl time video x2 f.tr a p ext audio in audio sw e x t in /c in blue back v.size dy video/chroma vcc 1v p-p video/chroma gnd vertical att att black stretch ga mma black intelligent monitoring y-sw out intelligent moni toring inte r carri er out acl/abcl aft out limite r in video out vco adj us/jpn vco adj 1v p-p tv in/ y in chroma tr a p v.pulse out inv fb p inv out vif gnd 8v hi vcc def gnd b mu te fm (w h ite ) v.shift sync slice take off angle stretch ga mma v coinb hvco adj vif vcoadj killerb saw if in lp f fsc out af amp 5.7v reg reset power on control vif vcc 5v p-on-on r eset to m cu from mcu vcc 5v 8.7v 5.7v 8.7v y sw lp f hpf v cc 8v 11v mcu v dd 5v 59 64 63 2 33 31 41 38 37 39 40 34 29 35 36 17 19 10 7 44 89 11 12 13 18 1 20 6 5 16 15 14 21 22 23 24 27 26 51 53 54 52 56 57 3 4 48 50 28 49 47 30 32 42 58 55 60 61 62 clk cont 25 clock control 45 46 def vcc 8v nc 43 nc nc
M61250BFP rev.1.0, sep.23.2 003, page 15 of 49 absolute maximum ratings (ta = 25c) item symbol rating unit power supply voltage vcc 6.0, 10.0 v internal power dissipation pd 2026 mw thermal derating kt 16.2 mw/ c ambient operating temperature topr ? 20 to +65 c storage temperature tstg ? 40 to +150 c thermal derating (maximum ratings) ambient temperature ( c) internal power dissipation pd (w) 0 25 50 75 100 125 15 0 2.0 1.5 1.0 0.5 2.5 65 1.38
M61250BFP rev.1.0, sep.23.2 003, page 16 of 49 i 2 c bus table 1. slave address= bah(write), bbh(read) a6 a5 a4 a3 a2 a1 a0 r/w 10111011/0 2. write table(input bytes ) sub address data hex bin d7 d6 d5 d4 d3 d2 d1 d0 initial (inhibited) rf delay adj 00h 00000000 0 100000040h (inhibited) viffreq5875 vif vco adj 01h 00000001 0 010000020h video mute audio ext c. clip level trap off video t sharp abcl black stre. off take off 02h 00000010 0 0 0 0000000h audio mute audio att 03h 00000011 0 0 0 0000000h abcl gain aft defeat video tone 04h 00000100 0 0 v1 v0 v0 v0 v0 v0 20h extrgb c. clip contrast control 05h 00000101 v0 v1 v0 v0 v0 v0 v0 v0 40h vif video out gain y/c ext y dl fine adj y dl time adj 06h 00000110 1 0 0 v0 v0 0 0 0 80h vif defeat tint control 07h 00000111 0 v1 v0 v0 v0 v0 v0 v0 40h blue back color control 08h 00001000 v0 v1 v0 v0 v0 v0 v0 v0 40h hv blk off vout stop fsc free htone sw (inhibited) 09h 00001001 0 0 0 0010004h brightness control 0ah 00001010 v1 v0 v0 v0 v0 v0 v0 v0 80h (inhibited) drive(r) 0bh 00001011 0 100000040h (inhibited) drive(b) 0ch 00001100 0 100000040h cut off(r) 0dh 00001101 1 0 0 0000080h cut off(g) 0eh 00001110 1 0 0 0000080h cut off(b) 0fh 00001111 1 0 0 0000080h white back v-free (inhibited) h vco adj 10h 00010000 0 0 1 0010024h (inhibited) v-size 11h 00010001 0 0 1 0000020h monitoring gamma control trap fine adj 12h 00010010 0 0 0 0000000h h-free v.1window ysw lpf h start service sw v shift 13h 00010011 0 0 0 0000000h black strech discharge black strech charge s.slice down2 s.slice down1 (inhibited) 14h 00010100 0 0 0 0001103h afc1 gain afc2 gain osd level analog osd us/jpn sw killer level 15h 00010101 0 0 0 0000000h vsyncdet aoto slice down fbp vth l afc2 h phase 16h 00010110 1 0 0 1000090h (reserved) 17h 00010111 0 v1 v0 v0 v0 v0 v0 v0 40h test1 (inhibited) 18h 00011000 00000000 00h bgpfbp off test2 (inhibited) 19h 00011001 00000000 00h test3 (inhibited) 1ah 00011010 00000000 00h (inhibited) 1bh 00011011 00000000 00h test4 vfree int vblkshift on 1ch 00011100 00000100 04h note: v0 / v1 ==> v- latch bit 3. read table (output bytes) sub address d7 d6 d5 d4 d3 d2 d1 d0 00h 00000000 killerb (not asigned) vcoinb stdetb aft0 aft1 hcoinb (not asigned) vblk shift (inhibited)
M61250BFP rev.1.0, sep.23.2 003, page 17 of 49 bus functions write function bit sub add data discription ini- tial note rf delay adj 7 00h d0-d6 rf agc delay point adjustment 40h vif vco adj 6 10h d0-d5 vif vcc free-running frequency adjustment (adjust by setting vif defeat = 1 to center the aft output) 20h vif freq. 58.75 1 01h d6 if 45.75/58.75 sw itching; 0: 45.75, 1: 58.75 mhz 0 vif video out gain 3 06h d5-d7 pin 58 ivf video-detection-wave output level adjustment 80h aft defeat 1 04h d6 aft output on/off (defeat) switch ing; 0: aft on (non defeat), 1: defeat 0 vif defeat 1 07h d7 vif agc gain normal/minimum switching; 0: agc function, 1: defeat (minimum gain) 0 audio att 7 03h d0-d6 pin 51 audio output level adjustment 00h audio ext 1 02h d6 audio internal signal and external signal input switching; 0: internal, 1: external 0 vif sif audio mute 1 03h d7 pin 53 audio direct output on/off (mute) switching; 0: audio on (non-muted), 1: mute 0 video tone 6 04h d0-d5 sharpness level control 20h v latch contrast control 7 05h d0-d6 contra st level control 40h v latch extrgb contrast clip 1 05h d7 ext rgb contrast lower-limit clipping on /off; 0: clipping on, 1: clipping off 0 v latch c. clip level 1 02h d5 ext rgb contrast lower-limit clipping level switching; 0: low (20h), 1: high (40h) 0 y dl time adj 2 06h d0-d1 y signal delay adjustment x0h y dl fine adj 1 06h d2 y signal delay fine adjustment 0 ext 1 06h d3 video input pins 41/38 switchin g; 0: pin 41, 1: pin 38 0 v latch y/c 1 06h d4 pins 38/41 composite input/yc input swit ching; 0: composite, 1: y/c mode 0 v latch y sw lpf 1 13h d5 pin 31 (y sw out) output f-characteristic switching; 0: flat, 1: lpf (fc=700 khz) 0 video tone sharp 1 02h d3 video tone level two level (sharp/soft) switching; 0: standard (soft), 1: sharp 0 video mute 1 02h d7 y signal output on/off (mute) switching; 0: mute off, 1: mute 0 trap off 1 02h d4 y signal chroma trap on/off switching; 0: trap on, 1: trap off 0 trap fine adj 2 12h d0-d1 chroma trap frequency fine adjust x0h black stretch off 1 02h d1 black stre tch circuit on/off switching; 0: black stretch on, 1: black stretch off 0 black stretch charge 2 14h d4-d5 black stretch charge time constant adjustment 0xh black stretch discharge 2 14h d6-d7 black stretch discharge time constant adjustment 0xh video gamma control 2 12h d2-d3 gamma level adjustment x0h tint control 7 07h d0-d6 hue control 40h v latch color control 7 08h d0-d6 color level control 40h v latch take off 1 02h d0 chroma bpf take-off function on/off switching; 0: bpf; 1: take off 0 us/jpn sw 1 15h d1-d3 us mode/jpn mode swit ching; 100: us mode, 011: jpn mode 0 killer level 1 15h d0 colorkiller sensitivity switching (active shallow direction); 0: 41 db,1: 34 db 0 chroma fsc 1 09h d5 x?tal oscillation circuit forced free-running mode; 0: off, 1: free-running 0
M61250BFP rev.1.0, sep.23.2 003, page 18 of 49 bus functions (cont) write (cont) function bit sub add data discription ini- tial note brightness control 8 0ah d0-d7 bright level control 80h v latch driver (r) 7 0bh d0-d6 r output level control 40h driver (b) 7 0ch d0-d6 b output level control 40h cut off (r) 8 0dh d0-d7 r output dc level control 80h cut off (b) 8 0eh d0-d7 g output dc level control 80h cut off (b) 8 0fh d0-d7 b output dc level control 80h blue back 1 08h d7 blue back screen on/off switching; 0: off, 1: blue back 0 white back 1 10h d7 white raster on/off switching; 0: off, 1: white back 0 abcl 1 02h d2 abcl on/off switchi ng; 0: off, 1: abcl on 0 abcl gain 1 04h d7 abcl sensitivity low/hi gh switching; 0: low, 1: hi 0 osd level 1 15h d5 osd level (70%/90%) switching; 0: 70%, 1: 90% 0 htone sw 1 09h d4 halftone on/off switching; 0: off, 1: halftone 0 rgb analog osd 1 15h d4 osd input digital/analog switching; 0: digital, 1: analog 0 afc2 h phase 5 16h d0-d4 screen horizontal position adjustment 90h ramp stop 1 09h d6 pin 5 vout (ramp/pulse) forced stop mode (when stopped, pin 5 at dc gnd level); 0: vout, 1: stop 0 service sw 1 13h d3 vertical output on/off switching; 0: vertical output on, 1: vertical output off 0 h start 1 13h d4 horizontal output out/st op switching; 0: stop, 1: h out 0 afc 1 gain 1 15h d7 horizontal afc gain a high/low switching; 0: low, 1: hi 0 afc 2 gain 1 15h d6 horizontal afc2 gain high/low switching; 0: high, 1: low 0 h vco adj 3 10h d0-d2 h vco free-running frequency adjustment 24h v shift 3 13h d0-d2 vertical ramp start timing adjustment x0h v-size 6 11h d0-d5 vertical ramp amplitude adjustment 20h h-free 1 13h d7 horizontal output forced free-running mode on/off switching; 0: off, 1: horizontal free-running 0 v-free 1 10h d6 vertical output forced free-running mode on/off switching; 0: off, 1: vertical free-running 0 s slice down 1 1 14h d2 sync detection slice leve l (50%/30%) switching; 0: 50%, 1: 30% 0 s slice down 2 1 14h d3 sync detection slice leve l (50%/40%) switching; 0: 50%, 1: 40% 0 audio slice down 1 16h d6 sync detection slice level (50%/40%) switching during image period; 0: slice level fixed, 1: slice level reduced 0 fbp vth l 1 16h d5 pin 10 (fbp in) slice level switching during image period; 0: vth = 2v (hblk width: narrow), 1: vth = 1 v (hblk width: wide) 0 hv blk off 1 09h d7 horizontal/vertical blanking on/o ff switching; 0: blanking on, 1: blanking off 0 v synk det 1 16h d7 vertical minimum sync detection width switching; 0: sync detect width =18 s, 1: sync detect width =14 s 90h 1 window 1 13h d6 vertical sync detection switching (1 window/2 window s); 0: 2 windows, 1: 1 window 0 bgpfbp off 1 19h d7 internal bgp on/off switching when no fbp input; 0: bgp on, 1: bgp off 0 vref int 1 1ch d6 inter face/non-interface switching at vertical free-running 04h vblk shift on 1 1ch d3 0: normal (vblk shifts by vshift), 1: vertical blanking width can be setted by un-interlocking vshift 04h def vblk shift 3 1ch d0-d2 d0-d2: vblk shift (initial value: 100=4) 04h monitoring 4 12h d4-d7 pin 18 intelligent monitoring mode switching 0xh test1 1 18h d6-d7 no use for customer (test bit) 0 test2 1 19h d6 no use for customer (test bit) 0 test3 1 1ah d6-d7 no use for customer (test bit) 0 test4 1 1ch d6 no use for customer (test bit) 04h
M61250BFP rev.1.0, sep.23.2 003, page 19 of 49 read function bit sub add data discription killerb 1 00h d7 colorkiller information output; "1" when killer off aft0 1 00h d3 aft information output (see note 1) aft1 1 00h d2 aft information output (see note 1) hcoinb 1 00h d1 horizontal sync detection; "1" when asynchronous fm stdetb 1 00h d6 fm radio mode detection; "1" when not detected vcoinb 1 00h d5 vertical sync detection; "1" when asynchronous stdetb 1 00h d4 tf mode detection; "1" when not detected note: 1.
M61250BFP rev.1.0, sep.23.2 003, page 20 of 49 test circuits 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 64 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 M61250BFP p14 2.2k p15 2.2k p16 2.2k 1 6.8k p7 0.01 sw 7 scl sda p10 p11 10k vr 20k 4700p m74ls221p 1 16 2 15 3 14 4 13 5 12 6 11 7 10 8 9 p17 47 0.01 p20 fast blk in p1 1 20k p6 p33 4.7 120p 3.579545mhz 1 75 1 0.015 8.2k 1 75 p47 p31 p37 p32 p30 50 sif in 0.01 p50 p49 p62 p53 p52 p54 p55 p58 p59 p60 50 a 47 0.01 a ext r in p24 ext g in 47 + 0.01 p5 ext b in p19 p29 p18 + 0.01 a a 47 p51 p61 p2 0.1 + 1 n.k.d part number m351t01
M61250BFP rev.1.0, sep.23.2 003, page 21 of 49 input signals 1. 10.1 vif/sif block sg no. signal description (50 ? termination) sg1 fo = 45.75 mhz, 90 db , fm = 20 khz, am 77.8% sg2 fo = 58.75 mhz, 90 db , fm = 20 khz, am 77.8% sg3 fo = 45.75 mhz, 90 db , cw sg4 f1 = 45.75 mhz, 90 db , cw f2 = 45.75 4.5mhz, 70 db , cw sg5 fo = 45.75 mhz, amplitude width variable, fm = 20 khz, am 77.8% sg6 fo = 45.75 mhz, amplitude widt h variable, fm = 20 khz, am 16% sg7 fo = 45.75 mhz, 80 db , fm = 20 khz, cw sg8 fo = 45.75 mhz, 110 db , fm = 20 khz, cw sg9 fo = 40.75 to 50.75 mhz (frequency variable), 90 db , cw sg10 fo = 45.75 mhz, 90 db , cw sg11 fo = 45.75 mhz, 90 db , cw sg12 fo = 53.75 to 63.75 mhz (frequency variable), 90 db , cw sg13 f1 = 45.75 mhz, 90 db , red raster signal, am = 87.5% video modulation, f2 = 4.5 4.5mhz, cw, p/s = 20 db sg14 fo = 45.75 mhz, standard 10-step wave, sync rate: 28.6%, am = 87.5% video modulation, sync chip level: 90 db sg15 fo = 45.75 mhz, 93 db , cw sg16 fo = 45.75 mhz, 73 db , cw sg17 fo = 4.5 mhz, 100 db , fm = 400 hz, fm 25 khz dev. sg18 fo = 4.5 mhz, 100 db , fm = 400 khz, am 30% sg19 fo = 4.5 mhz, 100 db , cw sg20 fo = 400 hz, 500 mvrms, cw sg21 fo = 0.5 to 8.5 mhz, 100 db , fm = 400 khz, fm 25 khz dev.
M61250BFP rev.1.0, sep.23.2 003, page 22 of 49 2. video/chroma/rgb/def block sg. e sg. a sg. b sg. c sg. d sg. f 1.5s 5.8s 4.7s f 2.0v 0v 20s 24 s sg no. signal description (75 ? termination) ntsc format apl 100% typical video signal. vertical signal is interlaced at 60 hz. 1.5s 5.8s 4.7s 1v p-p 0.714v 0.286v in the sg.a signal, the lumi. signal frequency and amplitude can be changed. however, typical amplitude is 0.714 vp-p. in the figure on the right, the lumi. signal is represented by f. ntsc typical monochrome video signal. vertical signal is interlaced at 60 hz. 1.5s 5.8s 4.7s 0.572v 0.286v 0.286v ntsc format video signal; apl variable. vertical signal is interlaced at 60 hz. 1.5s 5.8s 4.7s v y 0.286v ntsc format monochrome video signal. in the sg.c signal, the burst and chroma part frequency and amplitude can be changed. vertical signal is interlaced at 60 hz. 1.5s 5.8s 4.7s 0.286v v eb v ec f eb f ec typical state: veb=0.286v, vec=0.572v f eb=f ec=3.579545mhz 0v 20s 24 s fast blanking signal; synchronized with video input signal. v osd fast blanking signal; synchronized with video input signal.
M61250BFP rev.1.0, sep.23.2 003, page 23 of 49 2. video/chroma/rgb/def block (cont) signal description (75 ? termination) sg. h duty 90%, variable frequency, variable level. (typical: 1 vp-p) sg. i 1v p-p sg no. 1v p-p sg. g ntsc format rainbow color bar video signal. vertical signal is interlaced at 60 hz. ntsc format typical color bar video signal; vertical signal is interlaced at 60 hz. 1.5s 5.8s 4.7s 0.714v 0.286v duty variable (typical 95%), frequency variable, level variable (typical: 1 vp-p) sg. j sg. k ntsc format, typical 8-step wave signal; vertical signal is interlaced at 60 hz.
M61250BFP rev.1.0, sep.23.2 003, page 24 of 49 setup instruction for evaluation pcb 1. horizontal blanking pulse adjustment the horizontal blanking pulse timing and pulse width are adjusted using the variable resistances of a one-shot multivibrator, as shown below. pin 11 (h out) horizontal blanking pulse 8s 12s the timing is adjusted to 8 s using the pin 15 variable resistance of the m74ls221p ttl ic. also, the pulse width is adjusted to 12 s using the pin 7 variable resistance. 2. vif voc adjustment before carrying out the M61250BFP measurements, the vif vco should be adjusted using the following procedure. (1) input the i 2 c bus data for the vif frequency (01h d6) based on the if frequency. (45.75 mhz: 0, 58.75 mhz: 1) (2) input the i 2 c bus data for vif defeat on (07h d7 = 1). (3) adjust the i 2 c bus data for the vco control (01h d0 ? d5) so that the voltage of pin 2 (aft out) is closest to 2.5 v. (4) input the i 2 c bus data for vif defeat off (07h d7 = 0). voltage 45.75mhz 2.5v frequency ( or 58.75mhz ) 3. h vco adjustment prior to measurement of the M61250BFP, the following method is used for h vco adjustment. (1) the h vco control i 2 c bus data (1 ch d0-d3) is adjusted, and the pin 11 (h out) frequency is set to approx. 15.734 khz.
M61250BFP rev.1.0, sep.23.2 003, page 25 of 49 electrical characteristics (ta = 25 c) symbol item input signal test point limits unit notes subaddress pin sg min. typ. max 00h 01h 02h 03h 04h 05h 06h 07h 08h 09h 0ah 0bh 0ch 0dh 0eh 0fh 10h 11h 12h 13h 14h 15h 16h 17h 18h 19h 1ah 1bh 1ch icc typical conditions pin 28=5 v, pin 25=5 v, pin 24=0 v 40 20 02 00 20 40 80 40 40 00 80 40 40 80 80 80 24 20 00 10 00 00 88 40 00 00 00 00 00 icc5v 5v current drawn by the circuit (pins 3, 4, 39, 40) -- 3,4,39,4 0 95 115 135 ma vif/sif/video/chroma vcc icc34 pins 3 and 4 current drawn by the circuit - - 3,4 - 57 - ma reference data vif/sif/vcc icc3940 pins 39 and 40 current drawn by the circuit -- 39,40 -57-ma reference data video/chroma vcc icc8v 8v current drawn by the circuit -- 12,44 32 42 52 ma deflection/rgb drive 8v vcc icc12 pin 12 current drawn by the circuit - - 12 - 25 - ma reference data deflection vcc icc44 pin 44 current drawn by the circuit - - 44 - 17 - ma reference data rgb drive 8v vcc icc42 pin 42 current drawn by the circuit - - 42 4 6 8 ma 8.7 vreg vcc power power supply circuit typical conditions pin 28=5 v, pin 25=0 v, pin 24=0 v 40 adj 02 00 20 40 80 40 40 00 80 40 40 80 80 80 24 20 00 10 00 00 88 40 00 00 00 00 00 vth28 power on control threshold voltage - - 28 2.6 3 3.4 v v47h 8.7 vreg output voltage 1 - 47 8.3 8.7 9.1 v pin 28=5 v v47l 8.7 vreg output voltage 2 - 47 - 0 0.3 v pin 28=0 v v49 5.7 vreg output voltage 1 - 49 5.5 5.75 6.0 v pin 28=5 v v32h1 mcu 5.7 vreg output voltage 1 - - 32 5.4 5.65 5.9 v pin 28=5 v v32h2 mcu 5.7 vreg output voltage 2 - - 32 5.4 5.65 5.9 v pin 28=0 v reset reset typical conditions pin 28=5v, pin 25=5v 40 adj 02 00 20 40 80 40 40 00 80 40 40 80 80 80 24 20 00 10 00 00 88 40 00 00 00 00 00 v30h maximum reset output voltage - - 30 4.5 5 5.5 v v30l minimum reset output voltage - - 30 - 0 0.5 v th32 reset threshold voltage - - 32 4 4.2 4.4 v iic iic typical conditions ------- 40adj020020408040400080404080808024200010000088400000000000 i ack ack current - - - 1 - ma reference data vil scl/sda vth(l) - - 26,27 0.0 0.75 1.5 v vih scl/sda vth(h) - - 26,27 3.5 4.25 5.0 v f scl clock frequency - - 27 - - 100 khz
M61250BFP rev.1.0, sep.23.2 003, page 26 of 49 test point sg min. typ. max. 00h 01h 02h 03h 04h 05h 06h 07h 08h 09h 0ah 0bh 0ch 0dh 0eh 0fh 10h 11h 12h 13h 14h 15h 16h 17h 18h 19h 1ah 1bh 1ch vif if typical conditions pin 28=5 v, pin 25=5 v, pin 24=0 v 40 adj 02 00 20 40 80 40 40 00 80 40 40 80 80 80 24 20 00 10 00 00 88 40 00 00 00 00 00 vdc video-detection-waveform output direct current voltage - - 58 2.2 2.7 3.2 v pin 62=0 v vo4575 video-detection-waveform output (45.75 mhz) 63,64 sg1 58 0.8 1.2 1.5 vpp vo5875 video-detection-waveform output (48.75 mhz) 63,64 sg2 58 0.8 1.2 1.5 vpp +40 p/n video s/n 63,64 sg3 58 43 50 - db vf video frequency characteristics 63,64 sg4 58 4 5.4 - mhz vin min input sensitivity 63,64 sg5 58 - 45 50 db vin max maximum allowable input 63,64 sg6 58 100 108 - db gr ag control range - - - 50 - - db vo max - vo min v63h if agc maximum voltage - - 62 3.8 4.3 4.8 v v63t if agc voltage (80 db ) 63,64 sg7 62 2.3 2.8 3.3 v v63l if agc minimum voltage 63,64 sg8 62 1.3 1.8 2.3 v vdefeat vif deteat function 63,64 sg1 58 0 0.1 0.2 v pp 80 aft aft-detection-waveform sensitivity 63,64 sg9 2 7 10 13 mv/khz v60h aft maximum voltage 63,64 sg10 2 4.2 4.7 - v v60l aft minimum voltage 63,64 sg11 2 - 0.3 0.8 v v60d aft deteat function - - 2 2.0 2.5 3.0 v 80 vcu45 capture range (45.75mhz upper) 63,64 sg9 58 1.5 2.2 - mhz center frequency=45.75mhz vcl45 capture range (45.75mhz lower) 63,64 sg9 58 - -1.8 -1.1 mhz center frequency=45.75mhz vct45 capture range (45.75mhz total) - - 58 2.6 4.0 - mhz vcu45-vcl45 vcu58 capture range (58.75mhz upper) 63,64 sg12 58 1.5 2.2 - mhz center frequency=58.75mhz +40 vcl58 capture range (58.75mhz lower) 63,64 sg12 58 - -1.8 -1.1 mhz center frequency=58.75mhz +40 vct58 capture range (58.75mhz total) - - 58 2.6 4.0 - mhz vcu58-vcl58 im inter modulation 63,64 sg13 58 - 42 - db reference data symbol item input signal limits unit notes subaddress pin
M61250BFP rev.1.0, sep.23.2 003, page 27 of 49 test point limits sg 00h 01h 02h 03h 04h 05h 06h 07h 08h 09h 0ah 0bh 0ch 0dh 0eh 0fh 10h 11h 12h 13h 14h 15h 16h 17h 18h 19h 1ah 1bh 1ch dg dg 63,64 sg14 58 - 3 - % reference data dp dp 63,64 sg14 58 - 3 - deg reference data v62h rf ag maximum voltage 63,64 sg15 59 4.3 4.8 - v v62l rf ag minimum voltage 63,64 sg16 59 - 0.2 0.7 v dlph rf ag delay maximum point 63,64 sg5 59 95 108 - db 00 dlpl rf ag delay minimum point 63,64 sg5 59 - 58 71 db 7f dlp rf ag delay point adjustment range - - - 33 43 - db dlph-dlpl 00- 7f spn sync rate 63,64 sg14 58 25 28 33 % sif sif typical conditions pin 28=5 v, pin 25=5 v, pin 24=0 v 40 adj 02 00 80 20 40 80 40 40 00 80 40 40 80 80 80 24 20 00 10 00 00 88 40 00 00 00 00 00 vaf af direct output dc voltage - - 54 2.2 3.0 3.8 v voaf af direct output voltage 48 sg17 54 280 400 520 mv rms thd af af distortion rate output 48 sg17 54 - 0.5 3 % lim input limit sensitivity 48 sg17 54 - 46 58 db am amr r 48 sg18 54 48 54 - db afsn af s/n 48 sg19 51 49 55 - db geau ext audio gain 53 sg20 51 -4.1 -2.1 -0.1 db 40 7f 7f scfu sif capture range (upper) 48 sg21 54 5.5 7.5 - mhz variable input frequency scfl sif capture range (lower) 48 sg21 54 - 3 4.0 mhz variable input frequency vol- max audio output maximum amplitude 48 sg17 51 280 400 550 mv rms 7f vol-min audio output maximum attenuation 48 sg17 51 - -80 -69 db min. typ. max. symbol item input signal unit notes subaddress pin
M61250BFP rev.1.0, sep.23.2 003, page 28 of 49 test point limits sg 00h 01h 02h 03h 04h 05h 06h 07h 08h 09h 0ah 0bh 0ch 0dh 0eh 0fh 10h 11h 12h 13h 14h 15h 16h 17h 18h 19h 1ah 1bh 1ch video video typical conditions ------- pin 28=5 v, pin 25=5 v, pin 24=0 v 40 adj 02 00 20 40 80 40 40 00 80 40 40 80 80 80 24 20 00 10 00 00 88 40 00 00 00 00 00 2agtv video sw output level (tv input) 41 sg.a 31 1.6 2.0 2.6 v pp 2agev video sw output level (external input) 38 sg.a 31 1.6 2.0 2.6 v pp 8c ymax maximum video output 38 sg.a 14,15, 16 2.9 4.2 5.6 v 7f 8c 00 gy video gain 38 sg.a 14,15, 16 12 15 18 db 7f 8c 7f 8c 00 00 fby video frequency characteristic 38 sg.b 14,15, 16 -4 -1 - db f=5mhz, c-trap : off 10 crf1 chroma trap attenuation 1 38 sg.c 14,15, 16 - - -18 db 8c 00 02 trf chroma trap maximum attenuation 38 38 38 38 38 sg.c 14,15, 16 - - -20 db at trap fine adj. adjustment 8c 00 00- 03 ydl1 ydl time 1 sg. a 14,15, 16 190 260 330 ns 8c 00 ydl2 ydl time 2 sg. a 14,15, 16 120 200 280 ns ydl2=measured value -ydl1 measured value 8d 00 ydl3 ydl time 3 sg. a 14,15, 16 120 200 280 ns ydl3=measured value -ydl2 measured value 8e 00 ydl4 ydl time 4 sg. 38 38 38 38 sg. sg. sg. sg. 38 sg. a 14,15, 16 120 200 280 ns ydl4=measured value -ydl3 measured value 8f 00 gtnor video tone control characteristic 1 b 14,15, 16 1.0 1.4 1.8 v f=2.5mhz 8c 00 gtmax video tone control characteristic 2 b 14,15, 16 7 10 14 db f=2.5mhz 3f 8c 00 gtmin video tone control characteristic 3 b 14,15, 16 -6 -2 2 db f=2.5mhz 00 8c 00 gt2m video tone control characteristic 4 b 14,15, 16 -1 2 5 db f=2mhz 8c 00 gt5m video tone control characteristic 5 b 14,15, 16 -9 -5 -1 db f=5mhz 8c 00 bls black expansion characteristic 38 sg.k 14,15, 16 0.01 0.03 0.05 v adj 8c 00 adj 80 vmf video mute function 38 sg.a 14,15, 16 - -45 -35 db 80 7f 8c 00 min. typ. max. symbol item input signal unit notes subaddress pin
M61250BFP rev.1.0, sep.23.2 003, page 29 of 49 test point limits sg 00h 01h 02h 03h 04h 05h 06h 07h 08h 09h 0ah 0bh 0ch 0dh 0eh 0fh 10h 11h 12h 13h 14h 15h 16h 17h 18h 19h 1ah 1bh 1ch chrom a chroma typical c onditions ------- pin 28=5 v, pin 25=5 v, pin 24=0 v veb, vec: typical input level +6 db 40 adj 02 00 20 40 80 40 40 00 80 40 40 80 80 80 24 20 00 10 00 00 88 40 00 00 00 00 00 cnorr chroma typical output (r-y) 38 sg.c 59 390 560 790 mv 88 c0 40 cnorb chroma typical output (b-y) 38 38 38 sg.c 59 640 920 1290 mv 88 80 40 acc1 acc characteristic 1 sg. 38 sg. 38 sg. 38 sg. sg. 38 sg. e59 -3 0 3 db 88 80 40 acc2 acc characteristic 2 sg.e 59 -4.5 0 1.5 db veb, vec: typical input level -20 db 88 80 40 ov chroma overload characteristic 38 sg.e 59 -3 2 5 db v = 800 mv 80 40 vikn killer operation input level 38 sg.e 59 - -43 -35 db veb, vec: variable 88 88 88 80 40 killp color remaining on colorkilling 38 sg.e 59 - -45 -30 db v eb = 0mv 80 40 apcu apc pull-in range (upper) 38 sg.e 59 - -600 -300 hz feb=fec: variable 88 80 40 apcl apc pull-in range (lower) 38 sg.e 59 300 600 - hz feb=fec: variable 88 88 80 40 r/bn demodulation ratio 38 sg.e 59 0.40 0.57 0.80 - f ec =f eb +50khz c0/ 80 40 r/bu demodulation ratio (us mode) 38 sg.j 14,15 - 1.33 - - reference data 20 88 ff 08 c0/ 80 40 g/bu demodulation ratio (us mode) 38 sg.j 15,16 - 0.43 - - reference data 20 88 ff 08 c0/ 80 40 r/bj demodulation ratio (jpn mode) 38 sg.j 14,15 - 1.31 - - reference data 20 88 ff 06 c0/ 80 40 g/bj demodulation ratio (jpn mode) 38 sg.j 15,16 - 0.47 - - reference data 20 88 88 88 88 88 ff 06 02 c0/ 80 40 r-yn1 demodulation angle 1 e 59 86 103 120 deg f ec =f eb +50khz c0/ 80 40 r-yn2 demodulation angle 2 e 59 73 90 107 deg f ec =f eb +50khz c0/ 80 40 tc1 tint control characteristic 1 e59304560degf eb =f ec +50khz f7 80 40 tc2 tint control characteristic 2 e59304560degf eb =f ec +50khz 00 80 40 ffsc fsc output frequency 38 sg.c 38 29 3.5793 3.5796 3.5799 mhz 88 vfsc fsc output amplitude 1 c 29 1.4 2 2.6 v pp 88 ffscfree fsc output frequency in fsc free mode 38 sg.c 29 3.5790 3.5795 3.5810 mhz 88 20 vfsc fsc output amplitude 1 in fsc free mode 38 sg.c 29 1.4 2 2.6 v pp 88 20 min. typ. max. symbol item input signal unit notes subaddress pin
M61250BFP rev.1.0, sep.23.2 003, page 30 of 49 test point limits sg 00h 01h 02h 03h 04h 05h 06h 07h 08h 09h 0ah 0bh 0ch 0dh 0eh 0fh 10h 11h 12h 13h 14h 15h 16h 17h 18h 19h 1ah 1bh 1ch rgb rgb typical conditions ------- pin 28=5 v, pin 25=5 v, pin 24=0 v 40 adj 02 00 20 40 80 40 40 00 80 40 40 80 80 80 24 20 00 10 00 00 88 40 00 00 00 00 00 vblk output blanking voltage 38 38 38 38 38 sg.a 14,15, 16 0 0.1 0.3 v 88 00 gytyp contrast control characteristic 1 sg.b 14,15, 16 2.2 2.8 3.3 v pp f=100khz 88 88 00 00 00 gymin contrast control characteristic 2 sg.b 14,15, 16 - 200 300 mv f=100khz gyenor contrast control characteristic 3 sg.a 14,15, 16 2.2 2.8 3.3 v pin 33 =2.9 v 88 00 gyemin contrast control characteristic 4 sg. 38 sg. 38 sg. 38 sg. 38 sg. 38 sg. 38 sg. 38 sg. a 14,15, 16 - 100 200 mv pin 33 =0.0 v 88 00 gyeclip contrast control characteristic 5 21,22, 23 sg.f 14,15, 16 0.50 0.65 0.80 v pin 24 =2.5 v 00 88 00 lum nor brightness control characteristic 1 d 14,15, 16 1.7 2.1 2.5 v v y = 0.0v 88 00 lum max brightness control characteristic 2 d 14,15, 16 2.3 3 - v v y = 0.0v 88 00 ff lum min brightness control characteristic 3 d 14,15, 16 - 1.3 2 v v y = 0.0v 88 00 00 d(r)1 a 14 2.0 4.0 6.0 db 88 00 00 7f d(b)1 r driving control characteristic 1 b driving control characteristic 1 r driving control characteristic 2 b driving control characteristic 3 a 16 2.0 4.0 6.0 db 88 00 00 7f d(r)2 a 14 -5.0 -3.0 -1.0 db 88 00 00 00 d(b)2 a 16 -5.0 -3.0 -1.0 db 88 88 88 88 00 00 00 00 00 00 exd1(r) digital osd (r) i/o characteristic 1 23,24, 38 sg.f, sg.a 14 1.0 1.5 2.0 v pp v osd = 1.0v, sw23=on exd1(g) digital osd (g) i/o characteristic 1 22,24, 38 sg.f, sg.a 15 1.0 1.5 2.0 v pp v osd = 1.0v, sw22=on exd1(b) digital osd (b) i/o characteristic 1 21,24, 38 sg.f, sg.a 16 1.0 1.5 2.0 v pp v osd = 1.0v, sw21=on exd2(r) digital osd (r) i/o characteristic 2 23,24, 38 sg.f, sg.a 14 200 300 400 mv vosd = 1.0v, sw23=on exd2(r)=measured value - exd1(r) 88 00 20 exd2(g) digital osd (g) i/o characteristic 2 22,24, 38 sg.f, sg.a 15 200 300 400 mv vosd = 1.0v, sw22=on exd2(g)=measured value - exd1(g) 88 00 20 exd2(b) digital osd (b) i/o characteristic 2 21,24, 38 sg.f, sg.a 16 200 300 400 mv vosd = 1.0v, sw21=on exd2(b)=measured value - exd1(b) 88 00 20 exd1(r- g) digital osd (r-g) amplitude difference - - - -350 0 350 mv 88 exd1(g- b) digital osd (g-b) amplitude difference - - - -350 0 350 mv 88 exd1(b- r) digital osd (b-r) amplitude difference - - - -350 0 350 mv 88 exa(r) analog osd (r) i/o characteristic 23,24, 38 sg.f, sg.a 14 1.2 2.1 3.0 v pp v osd = 0.7v 40 88 00 10 exa(g) analog osd (g) i/o characteristic 22,24, 38 sg.f, sg.a 15 1.2 2.1 3.0 v pp v osd = 0.7v 40 88 00 10 exa(b) analog osd (b) i/o characteristic 21,24, 38 sg.f, sg.a 16 1.2 2.1 3.0 v pp v osd = 0.7v 40 88 00 10 min. typ. max. symbol item input signal unit notes subaddress pin
M61250BFP rev.1.0, sep.23.2 003, page 31 of 49 test point limits sg 00h 01h 02h 03h 04h 05h 06h 07h 08h 09h 0ah 0bh 0ch 0dh 0eh 0fh 10h 11h 12h 13h 14h 15h 16h 17h 18h 19h 1ah 1bh 1ch exa(r-g) analog osd (r-g) amplitude difference _ _ _ -350 0 350 mv 88 10 exa(g-b) analog osd (g-b) amplitude difference _ _ _ -350 0 350 mv 88 10 exa(b-r) analog osd (b-r) amplitude difference r cutoff control characteristic 1 g cutoff control characteristic 1 b cutoff control characteristic 1 r cutoff control characteristic 2 g cutoff control characteristic 2 _ _ _ -350 0 350 mv 88 10 ofrg offset voltage (r-g) 38 sg.d 14,15 -100 0 100 mv v y = 0.0v 88 00 ofbg offset voltage (b-g) 38 sg.d 15,16 -100 0 100 mv v y = 0.0v 88 00 c(r)1 38 sg. d 14 2.6 2.9 3.2 v v y = 0.0v 88 00 ff c(g)1 38 sg. d 15 2.6 2.9 3.2 v v y = 0.0v 88 00 ff c(b)1 38 38 38 38 38 38 38 38 sg. sg. sg. sg. sg. sg. sg. d 16 2.6 2.9 3.2 v v y = 0.0v 88 00 ff c(r)1 d 14 1.1 1.4 1.7 v v y = 0.0v 88 00 00 c(g)1 d 15 1.1 1.4 1.7 v v y = 0.0v 88 00 00 c(b)2 b cutoff control characteristic 2 d 16 1.1 1.4 1.7 v v y = 0.0v 88 00 00 ccon 1 color control characteristic 1 c 14,15, 16 2 5 8 db 80 88 7f ccon 2 color control characteristic 2 c 14,15, 16 - -15 -10 db 80 88 01 ccon 3 color control characteristic 3 c 14,15, 16 - -40 -35 db 80 88 00 mtxrb matrix ratio r/b sg.g 38 sg.g 14,16 0.81 0.98 1.08 - 88 mtxgb matrix ratio g/b 15,16 0.29 0.37 0.45 - 88 dosd1 digital osd switching characteristic 1 23,24, 38 sg.f, sg.a 14 - 0.05 0.13 us v osd = 1.0v, sw23=on dosd2 digital osd switching characteristic 2 23,24, 38 sg.f, sg.a 14 - 0.05 0.13 us v osd = 1.0v, sw23=on aosd1 analog osd switching characteristic 1 23,24, 38 sg.f, sg.a 14 - 0.05 0.13 us v osd = 1.0v 7f 88 10 aosd2 analog osd switching characteristic 2 23,24, 38 sg.f, sg.a 14 - 0.05 0.13 us v osd = 1.0v 7f 88 7f 88 7f 88 10 bb(r) blue background function (r) 14 1.7 2.1 2.5 v 88 80 bb(g) blue background function (g) 15 1.7 2.1 2.5 v 88 80 bb(b) blue background function (b) 38 sg.a 16 2.7 3.7 4.7 v 88 80 wb white raster function 38 38 38 sg.a sg.a sg.a 14,15, 16 2.7 3.7 4.7 v 88 a0 min. typ. max. symbol item input signal unit notes subaddress pin
M61250BFP rev.1.0, sep.23.2 003, page 32 of 49 test point limits sg 00h 01h 02h 03h 04h 05h 06h 07h 08h 09h 0ah 0bh 0ch 0dh 0eh 0fh 10h 11h 12h 13h 14h 15h 16h 17h 18h 19h 1ah 1bh 1ch def deflection system typical conditions ------- pin 28=5 v, pin 25=5 v, pin 24=0 v 40 adj 02 00 20 40 80 40 40 00 80 40 40 80 80 80 24 20 00 10 00 00 88 40 00 00 00 00 00 fh1 horizontal free-running frequency 1 - 11 15.3 15.7 16.1 khz fh2 horizontal free-running frequency 2 - 11 14.7 15.1 15.5 khz 20 fh3 horizontal free-running frequency 3 - 11 15.8 16.2 16.6 khz 26 hfree forced horizontal free-running operation 38 - - - sg.a 11 15.3 15.7 16.1 khz 88 90 fphu horizontal pull-in range (upper) 38 sg.h 11 250 500 - hz variable input frequency 88 fphl horizontal pull-in range (lower) 38 38 38 sg.h 11 - -500 -250 hz variable input frequency 88 hpt1 horizontal pulse timing 1 sg. a 11 12.0 13.5 15.0 s 88 80 80 hpt2 horizontal pulse timing 2 sg. a 11 2.5 4.0 5.5 s 88 80 9f hptw horizontal pulse width - - 11 21 25 29 s vh horizontal pulse amplitude - - 11 4.7 5.4 - v hsta horizontal pulse start operation - - 11 - 0.0 0.5 v 00 afcg afc gain operation 38 sg.a 7 2.0 3.0 10.0 db 88 80 fv vertical free-running frequency - - 5 556065hz vfree forced vertical free-running operation 38 sg.a 5 55 60 65 hz 88 64 svc service mode operation - - 5 1.0 1.5 2 v 18 fpvu vertical pull-in frequency (upper) 38 sg.h 5 63 67 - hz variable input frequency 88 fpvl vertical pull-in frequency (lower) 38 sg.h 5 - 55 57 hz variable input frequency 88 vrsi 1 vertical ramp size 38 sg.a 5 1.6 2.0 2.4 vpp 88 vrsc 1 vertical ramp size control range 1 38 sg.a 5 2.0 2.4 2.8 vpp 88 30 vrsc 2 vertical ramp size control range 2 38 38 38 sg.a 5 0.8 1.2 1.6 vpp 88 00 vrpo 1 vertical ramp position control range 1 sg.a 5 18 38 58 s 88 88 vrpo 2 vertical ramp position control range 2 sg.a 5 840 860 880 s measured value - vrpo 1 17 min. typ. max. symbol item input signal unit notes subaddress pin
M61250BFP rev.1.0, sep.23.2 003, page 33 of 49 test point limits sg 00h 01h 02h 03h 04h 05h 06h 07h 08h 09h 0ah 0bh 0ch 0dh 0eh 0fh 10h 11h 12h 13h 14h 15h 16h 17h 18h 19h 1ah 1bh 1ch vw vertical pulse width 38 sg.a 20 0.35 0.53 0.65 ms 88 vblkw vertical blanking width 38 sg.a 14,15, 16 1.32 1.47 1.62 ms 88 00 vblkw vs1 vertical blanking width vshift1 38 sg.a 14,15, 16 1.35 1.50 1.65 ms 88 00 08 vblkw vs2 vertical blanking width vshift2 38 sg.a 14,15, 16 1.73 1.88 2.03 ms 88 00 0c vblkw vs3 vertical blanking width vshift3 38 sg.a 14,15, 16 2.11 2.26 2.41 ms 88 00 0f wvss vertical blanking width 38 sg.i 5 14 - - us variable input signal duty 88 monit oring intelligent monitor system typical conditions ------- pin 28=5 v, pin 25=5 v, pin 24=0 v 40 adj 02 00 20 40 80 40 40 00 80 40 40 80 80 80 24 20 00 10 00 00 88 40 00 00 00 00 00 moni1 intelligent monitor 1 (composite sync) 41 sg.a 18 4.0 4.9 5.0 vpp note: this lsi cannot operate correctly if moni1 is used while the h-free bus bit (13h-d7) is set to 1. 00 moni2 intelligent monitor 2 (aft) 63,64 sg.7 18 2.0 2.5 3.0 v 10 moni3-1 intelligent monitor 3-1 (rf agc1) - - 18 4.0 4.3 4.6 v 20 moni3-2 intelligent monitor 3-2 (rf agc2) 63,64 sg.7 18 0.88 0.93 0.98 - pin 18 voltage/pin 59 voltage at rf agc voltage high 20 moni6 intelligent monitor 6 (video sw output) 41 sg.a 18 0.76 0.95 1.24 vpp 50 moni7 intelligent monitor 7 (g out) 41 sg.a 18 1.5 2.0 2.5 vpp amplitude measured from blanking level 00 60 moni8 intelligent monitor 8 (r out) 41 sg.a 18 1.5 2.0 2.5 vpp amplitude measured from blanking level 00 70 moni9 intelligent monitor 9 (b out) 41 sg.a 18 1.5 2.0 2.5 vpp amplitude measured from blanking level 00 80 moni10 intelligent monitor 10 (acl) - - 18 3.5 4.0 4.5 v 90 moni11 intelligent monitor 11 (v sync) 41 sg.a 18 3.5 4.0 4.5 vpp a0 moni12 intelligent monitor 12 (h out) 41 sg.a 18 3.6 4.0 4.4 vpp b0 moni13 intelligent monitor 13 (vif vcc) - - 18 2.30 2.50 2.70 v c0 moni14 intelligent monitor 14 (start-up vcc) - - 18 2.55 2.70 2.85 v d0 moni15 intelligent monitor 15 (video/chroma vcc) - - 18 2.30 2.50 2.70 v e0 moni16 intelligent monitor 16 (hi vcc) - - 18 2.55 2.70 2.85 v f0 moni1-c intelligent monitor i-c (sync ratio at h free mode) 41 sg.a 18 50 100 - % input sync ratio measured at h free mode 00 90 min. typ. max. symbol item input signal unit notes subaddress pin
M61250BFP rev.1.0, sep.23.2 003, page 34 of 49 method of measurement of el ectrical characteristics vif block ? p/n: video s/n 1. input sg3, and measure the rms value (noise value) for the signal output from pin 58. 2. the p/n is defined as follows. p/n = 20 log v 0 measured value (vp-p) x 10 3 x 0.7 noise measured value (mvrms) (db) ? vf: video frequency characteristic 1. input sg4, and adjust the f 2 frequency so that the 1 mhz beat component is output to pin 58. 2. adjust the voltage applied to pin 62 so that the 1 mhz beat component at pin 62 is 100 db . 3. gradually reduce the f 2 frequency, and measure the frequ ency at which the beat compon ent is 3 db lower than the level at 1 mhz. ? vin min: input sensitivity 1. lower the level of sg5 so that the input level is 3 db lower than the value measured under video-detection-wave output? for the v 0 item. ? vin max: maximum allowable input 1. input sg6 at 90 db . 2. the output level of pin 58 at this point should be v a . increase the amplitude of sg6 so that the input level indicates an output level for pin 58 that is 3 db lower than v a . ? aft: aft detection sensitivity v2h: aft maximum voltage v2l: aft minimum voltage aft is defined as follows. aft = (3.0 - 10.) x 10 3 mv df khz (mv/khz)
M61250BFP rev.1.0, sep.23.2 003, page 35 of 49 ? im: inter-modulation 1. input sg13 to pins 63 and 64. 2. measure the 0.92 mhz component and 3.58 mhz component of the pin 58 output. 3. im is defined as follows. im = 20 log 0.92 mhz component 3.58 mhz component (db) ? dlph: rf agc delay maximum point ? dlpl: rf agc delay minimum point 1. input sg5 to pins 63 and 64. 2. change the amplitude of sg5 and measure the level at which the voltage of pin 59 is 2.5 v. sif block ? lim: input limiting sensitivity gradually decrease the input level of sg17, and measure the input level at the point when the 400 hz component of pin 58 is 3 db lower than voaf. ? amr: amr 1. measure the 400 hz component for pin 54 and set it as vam. 2. amr is defined as follows. amr = 20 log voaf (mvrms) vam (mvrms) (db) ? afsn: af s/n 1. measure the noise (20 hz to 100 khz) of the pin 51 output. 2. af s/n is defined as follows. af s/n = 20 log voaf max measured value (db) video clock ? 2agtv: video sw output level (tv input) ? 2agev: video sw output level (external input) 1. input sg.a to pin 41 (2agtv) or pin 38 (2agev). 2. the amplitude (p-p) at pin 31 is measured. *in order to select tv or external input, use the subaddress 06h. ? ymax: maximum video output 1. input sg.a to pin 38. 2. measure the amplitude (p-p) other than the blan king part of the output of pins 14, 15, 16.
M61250BFP rev.1.0, sep.23.2 003, page 36 of 49 ? fby: video frequency characteristic 1. input sg.b (5 mhz, 0.4 vp-p) to pin 38. 2. measure the amplitude (p-p) other than the blanking pa rt of the output of pins 14, 15, 16, take the result to be yb. 3. fyb is defined as follows. fyb = 20 log yb (vp-p) gy (vp-p) (db) ? crf1: chroma trap attenuation 1 (normal r/g/b output) trf maximum chroma trap attenuation 1. input sg.c to pin 38, measure the 3.58 mhz frequency level with trap on/off (02h d4) data 1, take this to be n 0 . 2. also measure the level with trap on/off (02h d4) data 0. 3. crf1 is defined as follows. crf1 = 20 log measured value (mvp-p) n 0 (mvp-p) (db) 4. take the minimum value of crf1 when the i 2 c bus data of the trap fine adj (12h d0/d1) is adjusted to be trf. ? ydl1: ydl time 1 1. input sg.a to pin 38. 2. measure the delay time relative to the input signal of pins 14, 15, 16. the delay time at 50% rise level is measured. ? ydl2, 3, 4: ydl time 2, 3, 4 1. input sg.a to pin 38. 2. measure the delay time of the input signal and the pin 14, 15, 16 output signals. 3. ydl2, ydl3, ydl4 are defined as follows. ydl2 = measured value (ns) - ydl1 (measured value) ydl3 = measured value (ns) - ydl2 (measured value) ydl4 = measured value (ns) - ydl3 (measured value) ? gtmax: video tone control characteristic 2 1. input sg.b (f = 2.5 mhz) to pin 38. 2. the output amplitude of pins 14, 15, 16 when the video tone data is at the center (20 h) is taken to be gtnor. 3. the output amplitude of pins 14, 15, 16 when the video tone data is maximum is measured. 4. gtmax is defined as follows. gtmax = 20 log measured value (vp-p) gtnor (mvp-p) (db)
M61250BFP rev.1.0, sep.23.2 003, page 37 of 49 ? gtmin: video tone control characteristic 3 1. input sg.b (f=2.5 mhz) to pin 38. 2. the output amplitude of pins 14, 15, 16 when the video tone data is at the center (20 h) is taken to be gtnor. 3. the output amplitude of pins 14, 15, 16 when the video tone data is minimum is measured. 4. gtmin is defined as follows. gtmin = 20 log measured value (vp-p) gtnor (mvp-p) (db) ? gt2m: video tone control characteristic 4 1. take pin 14, 15, 16 output amplitude when input signal frequency is 2.5 mhz to be gtnor. 2. input sg.b (f = 2 mhz) to pin 38. 3. measure pin 14, 15, 16 output amplitude. 4. gt2m is defined as follows. gt2m = 20 log measured value (vp-p) gtnor (mvp-p) (db) ? gt5m: video tone control characteristic 5 1. take pin 14, 15, 16 output amplitude when input signal frequency is 2.5 mhz to be gtnor. 2. input sg.b (f = 2 mhz) to pin 38. 3. measure pin 14, 15, 16 output amplitude. 4. gt5m is defined as follows. gt5m = 20 log measured value (vp-p) gtnor (mvp-p) (db) ? bls: black stretch characteristic 1. input sg.k to pin 38. 2. with black stretch off (02h d1 = 1), adjust the contrast (05h) and brightness (0ah), and set the pin 14, 15, 16 output level of the first stage (lowest stage) to 2.0 v, and the output level of the eighth stage (highest stage) to 4.6 v. 3. change black stretch to on (02h d1 = 0), and measure the pin 14, 15, 16 first stage output level. 4. bls is defined as follows. bls = 2.0 - measured value (v) ? vmf: video mute function 1. input sg.a to pin 38. 2. with the mute switch (02h d7) on "vmfon", off "vmfoff", measure the output amplitude. 3. vmf is defined as follows. vmf = 20 log vmfon (vp-p) vmfoff (vp-p) (db)
M61250BFP rev.1.0, sep.23.2 003, page 38 of 49 chroma block ? cnorr: chroma typical output (r-y) ? cnorb: chroma typical output (b-y) 1. input sg.c to pin 38. 2. when "test mode" i 2 c data is 18h d6=1, 18h d7=1 and 19h d6=1 and when "test mode" i 2 c data is 18h d6=0, 18h d7=1 and 19h d6=1, take the pin 59 out put amplitude to be the chroma typical output (r-y) and chroma typical output (b-y), respectively. ? acc1: acc characteristic 1 1. input sg.e (eb=570 mv: level + 6 db) to pin 38. 2. measure the pin 59 output amplitude. 3. acc1 is defined as follows. acc1 = 20 log measured value (mvp-p) chroma typical output 1 (mvp-p) (db) ? acc2: acc characteristic 2 1. input sg.e (input level: -18 db) to pin 38. 2. measure the pin 59 output amplitude. 3. acc2 is defined as follows. acc2 = 20 log measured value (mvp-p) chroma typical output 1 (mvp-p) (db) ? ov: chroma overload characteristic 1. input sg.e (eb=800 mvp-p) to pin 38. 2. measure the pin 59 output amplitude. 3. ov is defined as follows. ov = 20 log measured value (mvp-p) chroma typical output 1 (mvp-p) (db) ? vikn: killer operation input level 1. input sg.e (variable level) at input level 0 db to pin 38. 2. while monitoring the pin 59 output amplitude, lower the input level, and measure the input level when the output amplitude vanishes. ? killp: hue remaining with killer 1. input sg.e (level: -40 db) to pin 38. 2. measure the pin 59 output amplitude. ? apcu: apc pull-in range (upper) ? apcl: apc pull-in range (lower) 1. input sg.e (feb-fec-3.579545 mhz) to pin 38. 2. after raising the frequency until the output from pin 59 va nishes, lower the frequency, and take the point at which an output appears to be fu. 3. after lowering the frequency until the output from pi n 59 vanishes, raise the frequency, and take the point at which an output appears to be fl. 4. apcu and apcl are defined as follows. apcu = fu ? 3579545 hz apcl = fl ? 3579545 hz
M61250BFP rev.1.0, sep.23.2 003, page 39 of 49 ? r/bn: demodulation ratio r-y/b-y 1. input sg.e (eb = single chroma = ec + 50 khz) to pin 38. 2. take the pin 59 output amplitude when "test mode" i 2 c data is 18h d6=1, d7=1 to be vry. 3. take the pin 59 output amplitude when "test mode" i 2 c data is 18h d6=0, d7=1 to be vby. 4. r/bn is defined as follows. r/bn = vry (mvp-p) vby (vp-p) (db) ? r/bu, g/bu: demodulation ratio ? r/bj, g/bj: demodulation ratio 1. input sg.j to pin 38. 2. take the pins 14, 15, 16 output amplitude when video mute on ( 02h d7 = 1, d7 = 1) and us mode (15h d3 = 1) are specified to be ury, ugy, and uby, respectively. 3. take the pins 14, 15, 16 output amplitude when video mute on ( 02h d7 = 1, d7 = 1) and jpn mode (15h d1 = 1, d2=1) are specified to be jry, jgy, and jby, respectively. 4. r/bu, g/bu, r/bj, and g/bj are defined as follows. ? r-yn: demodulation angle 1. input sg.e (eb = single chroma = ec + 5 khz) to pin 38. 2. take the pin 59 output amplitude when "test mode" i 2 c data is 18h d6=1, d7=1 to be vry. 3. take the pin 59 output amplitude when "test mode" i 2 c data is 18h d6=0, d7=1 to be vby. 4. r/yn is defined as follows. *the vector is determined taking the demodulator gain into account. ? tc1: tint control characteristic 1 ? tc2: tint control characteristic 2 1. input sg.c (see figure below) to pin 38. measure the abso lute angle with reference to the pin 59 output voltage, referring to the figure below. 2. take the tint data center part (07h data 40h) to be reference angle "tc", determine the tint data maximum and minimum values. tc1 and tc2 are defined as follows. tc = tcmax ? tc(deg) tc = tc ? tcmin (deg)
M61250BFP rev.1.0, sep.23.2 003, page 40 of 49 rgb interface block ? vbkl: output blanking voltage 1. input sg.a to pin 38. 2. measure the voltage of the pin 14, 15, 16 pedestal and blanking parts. ? gymax: contrast control characteristic 1 ? gymin: contrast control characteristic 2 1. input sg.b (f=100 khz) to pin 38. 2. measure the pin 14, 15, 16 output amplitude. ? gyenor: contrast control characteristic 3 ? gyemin: contrast control characteristic 4 1. input sg.a to pin 38. 2. measure the pin 14, 15, 16 output amplitude when applying 2.9 v and 0 v to pin 33. ? gyeclip: contrast control characteristic 5 1. input sg.f to pins 21, 22, 23, 24. 2. minimize the contrast control data, and measure the output amplitude at and above the pedestal part of pins 14, 15, 16. the amplitude of the blanking part is not measured. ? lum nor: brightness control characteristic 1 ? lum max: brightness control characteristic 2 ? lum min: brightness control characteristic 3 1. input sg.d (vy=0 v) to pin 38. 2. measure the dc voltage other than the blanking part of the output of pins 14, 15, 16. ? d(r)1: r drive control characteristic 1 1. input sg.a to pin 38. 2. measure the pin 14 output amplitude when the drive c ontrol data is at center and is maximum, take the results to be drnor and drmax respectively. 3. d(r)1 is defined as follows. ? d(b)1: b drive control characteristic 1 1. input sg.a to pin 38. 2. measure the pin 16 output amplitude when the drive control data is at center and is maximum, take the results to be dbnor and dbmax respectively. 3. d(b)1 is defined as follows.
M61250BFP rev.1.0, sep.23.2 003, page 41 of 49 ? d(r)2: r drive control characteristic 2 1. input sg.a to pin 38. 2. measure the pin 14 output amplitude when the drive control data is at center and is minimum, take the results to be drnor and drmin respectively. 3. d(r)2 is defined as follows. ? d(b)2: r drive control characteristic 2 1. input sg.a to pin 38. 2. measure the pin 16 output amplitude when the drive control data is at center and is minimum, take the results to be dbnor and dbmin respectively. 3. d(b)2 is defined as follows. ? exd(r): digital osd(r) input/output characteristic ? exd(g): digital osd(g) input/output characteristic ? exd(b): digital osd(b) input/output characteristic 1. input sg.f (vosd=1.0 v) to pins 21, 22, 23, 14. 2. measure the output amplitude at and above the pedestal part in pins 14, 15, 16. the amplitude of the blanking part is not measured. ? exd(r-g): digital osd (r -g) amplitude difference ? exd(g-b): digital osd (g-b) amplitude difference ? exd(b-r): digital osd (b-r) amplitude difference 1. exd(r-g), exd(g-b) and exd(b-r) are defined as follows. exd(r?g) = exd(r)?exd(g) exd(g?b) = exd(g)?exd(b) exd(b?r) = exd(b)?exd(r)
M61250BFP rev.1.0, sep.23.2 003, page 42 of 49 ? exa(r): analog osd(r) input/output characteristic ? exa(g): analog osd(g) input/output characteristic ? exa(b): analog osd(b) input/output characteristic 1. input sg.f (vosd=1.0 v) to pins 21, 22, 23, 14. 2. measure the output amplitude at and above the pedestal part in pins 14, 15, 16. the amplitude of the blanking part is not measured. ? exa(r-g): analog osd (r-g) amplitude difference ? exa(g-b): analog osd (g-b) amplitude difference ? exa(b-r): analog osd (b-r) amplitude difference 1. exa(r-g), exa(g-b) and exa(b-r) are defined as follows. exa(r?g) = exa(r)?exa(g) exa(g?b) = exa(g)?exa(b) exa(b?r) = exa(b)?exa(r) ? c(r)1: r cutoff characteristic 1 ? c(g)1: g cutoff characteristic 1 ? c(b)1: b cutoff characteristic 1 ? c(r)2: r cutoff characteristic 2 ? c(g)2: g cutoff characteristic 2 ? c(b)2: b cutoff characteristic 2 1. input sg.d (vy=0 v) to pin 38. 2. measure the dc voltage of other than the blanking part in the outputs of pins 14, 15, 16. ? ccon1: color control characteristic 1 ? ccon2: color control characteristic 2 ? ccon3: color control characteristic 3 1. input sg.c to pin 38. 2. measure the output amplitudes of pins 14, 15, 16 when iic data 08h=40h, take this to be ccon0. 3. measure the output amplitudes of pins 14, 15, 16 under each set of conditions. 4. ccon1, ccon2, ccon3 are defined as follows. ccon1, ccon2, ccon3 = 20 log measured value (vp-p) ccon0 (vp-p) (db)
M61250BFP rev.1.0, sep.23.2 003, page 43 of 49 ? mtxrb: matrix ratio r/b ? mtxgb: matrix ratio g/b 1. input sg.g (rainbow color bar) to pin 38. 2. measure the output amplitude when pins 14, 15, 16 are respectively vr, vg, vb. 3. mtxrb, mtxgb are defined as follows. ? dosd1: digital osd switching characteristic 1 ? dosd2: digital osd switching characteristic 2 1. input sg.f (vosd=1.0 v) to pins 21, 22, 23, 24. 2. measure the rise time and fall time of the output signals of pins 14, 15, 16 at and above pedestal level. the blanking part is not measured. ? aosd1: analog osd switching characteristic 1 ? aosd2: analog osd switching characteristic 2 1. input sg.f (vosd=1.0 v) to pins 21, 22, 23, 24. 2. measure the rise time and fall time of the output signals of pins 14, 15, 16 at and above pedestal level. the blanking part is not measured. ? bb(r): blue back function (r) ? bb(g): blue back function (g) ? bb(b): blue back function (b) 1. input sg.a to pin 38. 2. measure the output amplitude (p-p) of pins 14, 15, 16 other than the blanking part.
M61250BFP rev.1.0, sep.23.2 003, page 44 of 49 ? wb: white raster function 1. input sg.a to pin 38. 2. measure the output amplitude (p-p) of pins 14, 15, 16 other than the blanking part. deflection block ? fh1: horizontal free-running frequency 1 ? fh2: horizontal free-running frequency 2 ? fh3: horizontal free-running frequency 3 measure the frequency of pin 11 with no input. ? hfree: forced horizontal free-running operation 1. input sg.a to pin 38. 2. set h-free control data to on, measure the frequency at pin 11. ? fphu: horizontal pull-in range (upper) ? fphl: horizontal pull-in range (lower) 1. input sg.h to pin 38. 2. change the frequency of sg.h, measure the frequency range for which the pin 11 output signal and pin 38 input signal are pulled in, with respect to the video signal horizontal frequency. ? hpt1: horizontal pulse timing 1 ? hpt2: horizontal pulse timing 2 1. measure the horizontal pulse timing using the method for hpt1. 2. typical hpt2 = (measured value) - hpt1 ? hptw: horizontal pulse width ? vh: horizontal pulse amplitude
M61250BFP rev.1.0, sep.23.2 003, page 45 of 49 ? hsta: horizontal pulse stop operation confirm that when h.start sw off (0fh:d7=0), the horizontal output goes low. ? afcg: afc gain operation 1. measure the pin 7 output amplitude during afc switching, taking the result during sw on to be afcon, and during sw off to be afcoff. 2. afcg is defined as follows. ? fv: vertical free-running frequency measure the pin 5 output frequency with no input. ? vfree: forced vertical free-running operation 1. input sg.a to pin 38. 2. set v-free control data to on, measure the pin 5 output amplitude. ? scv: service mode operation measure the pin 5 output dc voltage with the service switch on. ? fpvu: vertical pull-in frequency (upper) ? fvpl: vertical pull-in frequency (lower) change the sg.h vertical frequency, and measure the frequency when the pin 5 output waveform is pulled in. ? vrsi: vertical ramp size ? vrsc1: vertical ramp size control range 1 ? vrsc2: vertical ramp size control range 2 ? vrpo1: vertical ramp position control range 1 ? vrpo2: vertical ramp position control range 2 1. measure the vertical ramp timing using the same method as for vrpo1. 2. vrpo2 is defined as follows. vrpo2 = (measured value) ?vrpo1
M61250BFP rev.1.0, sep.23.2 003, page 46 of 49 ? vw: vertical pulse width ? vblkw: vertical blk width ? wvss: minimum width at minimum sync operation reduce the width of the sg.i signal, and measure the input signal width when the pin 5 output waveform pull-in is lost.
M61250BFP rev.1.0, sep.23.2 003, page 47 of 49 the following function is added to the M61250BFP (vblkwvs1 to vblkwvs3) the vertical blanking width can be specified independently of vshift. note, however, that it operates in the same wa y as conventional products in the initial state. the following bits are added to the i 2 c register. ? vblk shift on (1ch d3) initial value = 0 0: shifts the vblk based on the conventional shift 1: shifts the vblk based on the vblk shift. ? vblk shift (1ch d2 to 1ch d0) initial value = 4 0: vblk period is 260 h to 21 h. 1: vblk period is 260 h to 21 h. 2: vblk period is 260 h to 23 h. 3: vblk period is 260 h to 25 h. 4: vblk period is 260 h to 27 h. 5: vblk period is 260 h to 29 h. 6: vblk period is 260 h to 31 h. 7: vblk period is 260 h to 33 h. 1234 5 6 7 8 910 11 12 20 21 vblk (vblk shift=0) (vblk shift=1) (vblk shift=2) 23 25 27 29 31 33 (vblk shift=3) (vblk shift=4) (vblk shift=5) 3 5 (vblk shift=6) (vblk shift=7) vout(vshift based shift) equivalent pulse equivalent pulse imaging period imaging period 525 524 523 vertical synchronization ? an image may be output during the v blanking period according to the vshift value. in this case, the vblk should be shifted in order not to output the image during the blanking period. carefully consider this because the output condition changes according to the circuit connected externally.
M61250BFP rev.1.0, sep.23.2 003, page 48 of 49 important information ? each application should be thoroughly studied and evaluated before making a decision. ? 47 mf and higher electrolytic capacitors and 0.01 mf and higher ceramic capacitors should be connected in parallel between each of the power supply pins (3, 4, 12, 39, 42, 44) and ground pin. in addition, it is recommended that the connectors be made as close to the ic power supply pins as possible. ? the c-sync output operation of the intelligent monitor (1 8 pins) cannot be guaranteed at hfree (13h: d7 = 1) . ? when purchasing i2c bus components, a license to use these components within a 12c bus system is provided under the 12c patent rights of philips corp. however, the bus system must conform to the 12c specifications stipulated by philips.
M61250BFP rev.1.0, sep.23.2 003, page 49 of 49 package dimensions lqfp64-p-1414-0.8 weight(g) ? jedec code eiaj package code lead material cu alloy 64p6u-a plastic 64pin 14 14mm body lqfp ? 0.1 0.8 ? 0.2 ? ? ? ? ? ? ? ? ? ? ? symbol min nom max a a 2 b c d e h e l l 1 y b 2 dimension in millimeters h d a 1 ? ? i 2 ? ? m d 14.4 ? ? m e 14.4 0? 8? 0.1 0.2 1.0 0.7 0.5 0.3 16.2 15.8 14.1 13.9 16.2 15.8 14.0 14.1 13.9 14.0 16.0 16.0 0.175 0.125 0.105 0.45 0.37 0.32 1.4 0 1.7 e lp 0.45 0.95 ? ? 0.6 0.5 0.25 ? 0.75 ? x a3 recommended mount pad detail f mmp e h e 1 17 32 64 49 16 48 33 h d d a y b x m e f m d l 2 b 2 m e e a 1 a 2 l 1 l lp a3 c
? 2003. renesas technolo gy corp., all ri g hts reserved. printed in japan . colo p hon 1.0 keep safet y first in y our circuit desi g ns ! 1. renesas technolo gy corp. puts the maximum effort into makin g semiconductor products better and more reliable, but there is alwa y s the possibilit y that trouble m a y occur with them. trouble with semiconductors ma y lead to personal in j ur y , fire or propert y dama g e . remember to give due consideration to safety when making your circuit designs, with appropriate measures such as (i) placem ent of substitutive, auxiliary circuits, (ii) use of nonflammable material or (iii) prevention against any malfunction or mishap. notes regarding these materials 1. these materials are intended as a reference to assist our customers in the selection of the renesas technology corp. product best suited to the customer's application; they do not convey any license under any intellectual property rights, or any other rights, belonging to renesas t echnology corp. or a third party. 2. renesas technology corp. assumes no responsibility for any damage, or infringement of any third-party's rights, originating in the use of any product data, diagrams, charts, programs, algorithms, or circuit application examples contained in these materials. 3. all information contained in these materials, including product data, diagrams, charts, programs and algorithms represents i nformation on products at the time of publication of these materials, and are subject to change by renesas technology corp. without notice due to product improvement s or other reasons. it is therefore recommended that customers contact renesas technology corp. or an authorized renesas technology corp. product distrib utor for the latest product information before purchasing a product listed herein. the information described here may contain technical inaccuracies or typographical errors. renesas technology corp. assumes no responsibility for any damage, liability, or other loss rising from these inaccuracies or errors. please also pay attention to information published by renesas technology corp. by various means, including the renesas tech nology corp. semiconductor home page (http://www.renesas.com). 4. when using any or all of the information contained in these materials, including product data, diagrams, charts, programs, a nd algorithms, please be sure to evaluate all information as a total system before making a final decision on the applicability of the information and products. renesas technology corp. assumes no responsibility for any damage, liability or other loss resulting from the information contained herein. 5. renesas technology corp. semiconductors are not designed or manufactured for use in a device or system that is used under ci rcumstances in which human life is potentially at stake. please contact renesas technology corp. or an authorized renesas technology corp. product distributor when considering the use of a product contained herein for any specific purposes, such as apparatus or systems for transportation, vehicular, medical, aerosp ace, nuclear, or undersea repeater use. 6. the prior written approval of renesas technolo gy corp. is necessar y to reprint or reproduce in whole or in part these materials . 7 . if these products or technolo g ies are sub j ect to the japanese export control restrictions, the y must be exported under a license from the japanese g overnment and cannot b e imported into a countr y other than the approved destination. an y diversion or reexport contrar y to the export control laws and re g ulatio n s of japan and/or the countr y of destination is prohibited . 8. please contact renesas technolo gy corp. for further details on these materials or the products contained therein . s ales strate g ic plannin g div. nippon bld g ., 2-6-2, ohte-machi, chi y oda-ku, tok y o 100-0004, japa n htt p ://www.renesas.co m renesas technology america, inc. 450 holger way, san jose, ca 95134-1368, u.s.a tel: <1> (408) 382-7500 fax: <1> (408) 382-7501 renesas technology europe limited. dukes meadow, millboard road, bourne end, buckinghamshire, sl8 5fh, united kingdom tel: <44> (1628) 585 100, fax: <44> (1628) 585 900 renesas technology europe gmbh dornacher str. 3, d-85622 feldkirchen, germany tel: <49> (89) 380 70 0, fax: <49> (89) 929 30 11 renesas technology hong kong ltd. 7/f., north tower, world finance centre, harbour city, canton road, hong kong tel: <852> 2265-6688, fax: <852> 2375-6836 renesas technology taiwan co., ltd. fl 10, #99, fu-hsing n. rd., taipei, taiwan tel: <886> (2) 2715-2888, fax: <886> (2) 2713-2999 renesas technology (shanghai) co., ltd. 26/f., ruijin building, no.205 maoming road (s), shanghai 200020, china tel: <86> (21) 6472-1001, fax: <86> (21) 6415-2952 renesas technology singapore pte. ltd. 1, harbour front avenue, #06-10, keppel bay tower, singapore 098632 tel: <65> 6213-0200, fax: <65> 6278-8001 renesas sales offices

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